1. Field of the Invention
The present invention relates to a SOI wafer, a manufacturing method therefor, and a MEMS device using a SOI wafer.
2. Description of the Related Art
A silicon on insulator (SOI) wafer in which a silicon layer is provided on a silicon wafer via an intermediate insulating film is excellent in element isolation, and has advantages of being able to reduce parasitic capacitance between an element and the wafer, and in addition, of being able to form a three-dimensional structure. Therefore, a SOI wafer is suitable for a hybrid integrated circuit in which a plurality of kinds of elements such as a bipolar element, a MOS element, and a power element are mounted on one chip, or a high pressure resistant integrated circuit.
Further, a cavity SOI wafer having a cavity therein is also suitable for application to an integrated MEMS device in which a hybrid integrated circuit and micro electro mechanical systems (MEMS) are merged.
As a method of manufacturing a SOI wafer, the following method is known (see, for example, Japanese Patent Application Laid-open No. 2001-44398). In the method disclosed in Japanese Patent Application Laid-open No. 2001-44398, first, there are prepared a support wafer having one mirror polished surface and an active layer wafer having one mirror polished surface. Then, an oxide film of a predetermined thickness is formed on a surface, in particular, on the mirror surface side, of the support wafer.
Then, the mirror surface of the support wafer having the oxide film formed thereon is bonded, as a bonding surface, to the mirror surface of the active layer wafer. After the bonding, in order to reinforce the bonding power, bonding reinforcing heat treatment is carried out. After that, by grinding and polishing a part of the active layer wafer, a SOI wafer having a SOI layer of a predetermined thickness may be obtained.
In regards to a method of manufacturing a cavity SOI wafer suitable for a MEMS device, first, as a support wafer, a wafer having a desired cavity formed on a mirror surface side thereof and an oxide film then formed thereon is prepared. Then, the mirror surface of the support wafer having the cavity and the oxide film formed thereon is bonded, as a bonding surface, to a mirror surface of an active layer wafer.
Then, by carrying out bonding reinforcing heat treatment and grinding and polishing the active layer wafer similarly to the case disclosed in Japanese Patent Application Laid-open No. 2001-44398, a cavity SOI wafer having a SOI layer of a predetermined thickness and having a cavity formed therein may be obtained. In this case, by carrying out the bonding in a chamber under pressure control, the internal pressure of the cavity may be set at a desired value.
On the other hand, as a semiconductor device becomes finer and more highly integrated, the effect of metal impurities remaining on a wafer on characteristics and reliability of the device becomes greater. FIG. 9 is a sectional view illustrating a conventional SOI wafer. With reference to FIG. 9, in a SOI wafer in which a support wafer 51 and an active layer 52 formed by grinding and polishing an active layer wafer are bonded together with an oxide film 53 therebetween, metal impurities 54 remain at a bonding interface.
As a method of gettering metal impurities in a bonded SOI wafer, conventionally, for example, there is known a method in which a gettering layer is provided at the bonding interface (see, for example, Japanese Patent Translation Publication No. 2007/072624 and Japanese Patent Application Laid-open No. 2008-28244).
In the method disclosed in Japanese Patent Translation Publication No. 2007/072624, in a bonding reinforcing heat treatment step after the support wafer and the active layer wafer are bonded together, after at least heat treatment at a temperature in the range of 950 to 1,100° C. is carried out, by carrying out heat treatment at a temperature higher than 1,100° C., the bonding interface is caused to have a high gettering ability. However, the detailed reason that the bonding interface obtains the gettering ability by carrying out such two-stage heat treatment is not disclosed.
Further, in the method disclosed in Japanese Patent Application Laid-open No. 2008-28244, by carrying out the bonding under a state in which organic matter exists on a surface of a wafer before the bonding and carrying out bonding reinforcing heat treatment under a state in which the organic matter is confined at the bonding interface, minute crystal defects are formed at the bonding interface, and the crystal defects getter the metal impurities.
Note that, the crystal defects are minute crystal defects stemming from carbon produced by degradation of the organic matter. Further, the existence of carbon at the bonding interface may be analyzed by secondary ion mass spectrometry (SIMS), and the existence of carbon at a bonding surface may be analyzed by gas chromatograph-mass spectrometry (GC-MS) or the like.
However, the conventional technologies have the following problems.
The gettering method as disclosed in the above-mentioned Japanese Patent Translation Publication No. 2007/072624 and Japanese Patent Application Laid-open No. 2008-28244 cannot be used for a cavity SOI wafer having a cavity formed therein and a MEMS device using a cavity SOI wafer.
The reason for this is, in such a cavity SOI wafer and a MEMS device using a cavity SOI wafer, after the cavity SOI wafer is formed, for the purpose of forming a desired circuit element, high temperature heat treatment at 1,000° C. or higher is required a plurality of times.
Therefore, there is a problem that, even when gettering is carried out once, if metal impurities remain inside, the metal impurities diffuse again to lower the reliability of the cavity SOI wafer and the MEMS device using a cavity SOI wafer.
Further, there is a problem that rediffusion of the metal impurities may contaminate a manufacturing system. Further, because of the cavity, there is a problem that the thinned active layer may be broken, which results in a serious situation that the metal impurities attach to the manufacturing system or other products.